<div dir="ltr"><br><div class="gmail_extra">Hi Saso,</div><div class="gmail_extra">Please see reply within email.</div><div class="gmail_extra"><br><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">
<div class="im">
> prtpicl should display correctly details to resource addressing, cause<br>
> slots are assigned.<br>
<br>
</div>Attached, both the short and verbose version.<br></blockquote><div style>I will check that.</div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">
<div class="im">
>> ..."The problem appears to be that Illumos doesn't recognize any PCI<br>
> bridges beyond those attached to CPU1.<br>
><br>
> yes, maybe its a PCIe-PCI bridging issue, even i doubt. try kdb debug<br>
> state...<br>
> ::bp pcieb`pcieb_attach<br>
> :c<br>
> pcieb`pcieb_dbg_print/W 0x1 --- this should display basic<br>
> debugged information<br>
> :c<br>
<br>
</div>Compiled a debug version of the pcieb module and attached the output<br>
from this. Strangely enough, the output stopped for considerable time<br>
between lines 21 and 22 in the output, so between lines:<br>
<br>
pcieb(0): pwrINITCHILD: config regs setup for pci15d9,690@0<br>
<br>
and<br>
<br>
pcieb(1): pwrpcieb_pwr_disable: disabling PM</blockquote><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">
after which lots of output proceeded quickly. Could it be that the<br>
probing code is getting stuck on and then giving up on probing a bridge<br>
here?<br></blockquote><div><br></div><div><div>I don't know what system is doing.. if its PSM probing issue, could you check it following</div><div>option edited/entered in file /etc/system and reboot.<br></div><div>
<br></div><div>set apix_enable = 0x0<br></div></div><div><br></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">
<div class="im">
> also. try with disabled (both) MSI and workaround patch to 41210/chipset<br>
> individually.<br>
> pcieb`pcieb_enable_msi/W 0x1<br>
> pcieb_disable_41210_wkarnd/W 0x1<br>
<br>
</div>Neither setting changed anything.<br></blockquote><div><br></div><div style>sorry, my typing error. it should have been zero not one;</div><div style><span style="color:rgb(80,0,80);font-family:arial,sans-serif;font-size:13px">pcieb`pcieb_enable_msi/W 0x0</span><br>
</div><div style><span style="color:rgb(80,0,80);font-family:arial,sans-serif;font-size:13px"><br></span></div><div style><br></div><div style><br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">
<div class="im">
> i'm not sure if there is any resource conflict issue; mdb -k | ::interrupts<br>
> as obviously, h/w is remote!<br>
<br>
</div>Here's the output of that:<br>
<br>
# echo ::interrupts | mdb -k<br>
CPU/Vect IRQ IPL Bus Trg Type Share APIC/INT# ISR<br>
1/0x20 9 9 PCI Lvl Fixed 1 0x0/0x9 acpi_wrapper_isr<br>
2/0x20 11 14 PCI Lvl Fixed 1 0x0/0xb hpet_isr<br>
3/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler<br>
4/0x20 - 5 PCI Edg MSI-X 1 - mrsas_isr<br>
7/0x20 1 5 ISA Edg Fixed 1 0x0/0x1 i8042_intr<br>
8/0x20 12 5 ISA Edg Fixed 1 0x0/0xc i8042_intr<br>
8/0x22 - 5 PCI Edg MSI 1 - mpt_intr<br>
12/0x20 3 12 ISA Edg Fixed 1 0x0/0x3 asyintr<br>
13/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler<br>
14/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler<br>
15/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler<br>
16/0x20 - 7 PCI Edg MSI 1 - pcieb_intr_handler<br>
17/0x20 - 4 PCI Edg MSI 1 - pcieb_intr_handler<br>
18/0x20 16 9 PCI Lvl Fixed 1 0x0/0x10 ehci_intr<br>
19/0x20 23 9 PCI Lvl Fixed 1 0x0/0x17 ehci_intr<br>
20/0x20 - 6 PCI Edg MSI-X 1 - igb_intr_tx_other<br>
21/0x20 - 6 PCI Edg MSI-X 1 - igb_intr_rx<br>
all/0xf0 - 15 - Edg IPI 1 - xc_serv<br>
all/0xf1 - 11 - Edg IPI 0 - poke_cpu<br>
all/0xf2 - 14 - Edg IPI 1 - kcpc_hw_overflow_intr<br>
all/0xf3 - 15 - Edg IPI 1 - apic_error_intr<br>
all/0xf4 - 2 - Edg IPI 1 - cmi_cmci_trap<br>
all/0xf5 - 14 - Edg IPI 1 - cbe_fire<br>
all/0xf6 - 14 - Edg IPI 1 - cbe_fire<br>
<br>
Hope this provides more insight. If it helps, I can arrange for direct<br>
access to the machine (both to the OS and the BMC).<br></blockquote><div style><br></div><div style>handlers look ok here... let see if things workout with basic options, </div><div style>else would require access to h/w.</div>
<div style><br></div><div style>Cheers,</div><div style><br></div><div style><br></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">
Cheers,<br>
--<br>
Saso<br>
</blockquote></div><br></div></div>